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[Other resourceChinese_Calendar

Description: 一个单片机+实时时钟芯片实现的万年历程序,包括源代码和原理图设计,以及一些相关资料。-a real-time clock chip to achieve the hefty almanac procedures, including source code and the schematic design, and some relevant information.
Platform: | Size: 495614 | Author: 孔繁锵 | Hits:

[Other resourceOlympic_Clock

Description: Olympic clock circuit schematic design reference,maybe you just search it now,haha1
Platform: | Size: 102507 | Author: csallon | Hits:

[Embeded-SCM DevelopmsTimer

Description: (原创)高精度计时器电路原理图。采用AT89S52加DP8573,实现两个功能:带掉电保持功能的日历时钟、由外部开关信号触发的高精度计时。-(Original) high-precision timer circuit schematic. Using AT89S52 plus DP8573, realize two functions: to maintain power-down function with calendar clock, by an external switch to trigger the high-precision timing signal.
Platform: | Size: 55296 | Author: 王平 | Hits:

[Embeded-SCM DevelopmsTimingV1

Description: (原创)高精度电子时钟和计时器电路版图。与本人另外上传的原理图配套,完全对应,可直接加工制作。-(Original) high-precision electronic clock and timer circuit layout. And I uploaded another schematic matching entirely correspond directly processed.
Platform: | Size: 161792 | Author: 王平 | Hits:

[SCMDS1302_time

Description: 时钟芯片DS1302控制驱动程序。。。带PROTEUS原理图,可以仿真。效果不错-Clock chip DS1302 control driver. . . With PROTEUS schematic can be simulation. Good results
Platform: | Size: 78848 | Author: 郭明 | Hits:

[Embeded-SCM DevelopUSRP_REV_4_2

Description: 软件无线电USRP v4.2版本硬件原理图,包括clock、debug board、fpga、interface、power等部分,有pdf、sch、ps等多种格式。-Software Radio USRP v4.2 version of the hardware schematic diagram, including clock, debug board, fpga, interface, power and other parts, there are pdf, sch, ps, such as a variety of formats.
Platform: | Size: 1079296 | Author: wivy | Hits:

[SCMc51shiyan_daima

Description: c51单片机实验程序代码--流水灯、时钟、液晶驱动,串口异步通信、AD、DA、ROM 扩展、IO扩展等等,附原理图,对初学者很有帮助。-C51 single-chip experimental procedure code- water lights, clock, LCD driver, serial asynchronous communication, AD, DA, ROM expansion, IO expansion and so on, with schematic diagram, useful for beginners.
Platform: | Size: 257024 | Author: 邓俊 | Hits:

[Embeded-SCM Develop3208LED_SCH

Description: 3208电子钟的原理图和源程序代码,用的是点阵的方式-3208 electronic clock schematic and source code, using a dot matrix manner
Platform: | Size: 175104 | Author: 飞山 | Hits:

[SCMgxm12864e-35+ds12887

Description: mega128做的ds12887的时钟,带阴历,测温;原理图,pcb和程序.-mega128 clock ds12887 do with the lunar calendar, temperature measurement schematic, pcb and procedures.
Platform: | Size: 2520064 | Author: zzy | Hits:

[OS program61EDA_D1077

Description: 数字钟电路原理图程序清单 ********顶层程序描述*********** 程序:TIMER_SET.VHD-Digital clock circuit schematic process procedures described in the top of the list of******************* procedures: TIMER_SET.VHD
Platform: | Size: 9216 | Author: yimilai | Hits:

[OtherIntelligentelectronicclock

Description: Intelligent electronic clock with alarm clock function, including electronic, the electronic bell schematic, physical map, the source code.
Platform: | Size: 113664 | Author: 刘星 | Hits:

[SCMshow_Timer_lastone

Description: 本文件是一套用示波器显示时钟走动和头像动画的系统,包括原理图文件和程序文件,还有效果图进效果DV图文件-This document is an oscilloscope display with clock and head of animation around the system, including schematic documents and program files, as well as the effect of graph paper into the effects of DV map
Platform: | Size: 5588992 | Author: wagjur | Hits:

[SCMtime

Description: 简易时钟,含分时校时功能,在keil环境下编写,含proteus原理图-Simple clock, with time at school functions in the preparation of keil environment, including schematic proteus
Platform: | Size: 47104 | Author: 潘两彬 | Hits:

[Com Portresources

Description: 这个包中提供了一些有实际应用价值的子程序供参考选用 SUB1----X25045/43 看门狗/存储器与 89C2051接口子程序 源程序/原理图(21K)X25045.EXE SUB2----AT24C02/04/08/16 串行存储器与 89C2051接口子程序 源程序/原理图(22K) AT24C02.EXE SUB3----红外遥控器(熊猫M50462/C54L2)与 89C2051接口子程序 源程序/原理图(21K) M50462.EXE SUB4----DS1302/HT1302 实时时钟与 89C2051接口子程序 源程序/原理图(20K) DS1302.EXE SUB6----AT89C2051与上位机RS232通讯接口子程序 源程序/原理图(25K) RS232.EXE SUB7----VB5.0 与AT89C2051通讯接口子程序 源程序/原理图(22K) VB5.EXE SUB8----单片机间RS485多机通讯子程序 源程序/原理图(24K) RS485.EXE -This package provides the practical application of some value for reference subroutine SUB1----X25045/43 optional watchdog/memory interface and subroutine 89C2051 source/schematic (21K) X25045.EXE SUB2---- AT24C02/04/08/16 serial memory interface and subroutine 89C2051 source/schematic (22K) AT24C02.EXE SUB3---- infrared remote control (Panda M50462/C54L2) with 89C2051 interface subroutine source/principle Map (21K) M50462.EXE SUB4----DS1302/HT1302 real-time clock and interface subroutine 89C2051 source/schematic (20K) DS1302.EXE SUB6---- AT89C2051 and PC RS232 communication interface subroutine source/schematic (25K) RS232.EXE SUB7---- VB5.0 and AT89C2051 communication interface subroutine source/schematic (22K) VB5.EXE SUB8---- single-chip multi-machine communication between the RS485 source subroutine/schematic diagram (24K) RS485.EXE
Platform: | Size: 159744 | Author: jiazhenbang | Hits:

[Embeded-SCM DevelopDS1302

Description: ds1302时钟,可以显示系统当前时间。有完整的C代码,还有用proteus软件仿真成功的原理图。-ds1302 clock, you can display the current time. Complete C code, as well as with the success of software simulation proteus schematic.
Platform: | Size: 77824 | Author: yiyuhi | Hits:

[SCMLC_rar

Description: 基于AT89S52的单片机温度时钟系统的原理图 很实用 是单片机实习的一个作品 -AT89S52 microcontroller-based temperature clock system is very useful schematic of a single-chip attachment works
Platform: | Size: 17408 | Author: 刘超 | Hits:

[Embeded-SCM DevelopdeCPLDVHDLshijong

Description: 基于CPLD的VHDL语言数字钟(含秒表)设计 利用一块芯片完成除时钟源、按键、扬声器和显示器(数码管)之外的所有数字电路功能。所有数字逻辑功能都在CPLD器件上用VHDL语言实现。这样设计具有体积小、设计周期短(设计过程中即可实现时序仿真)、调试方便、故障率低、修改升级容易等特点。 本设计采用自顶向下、混合输入方式(原理图输入—顶层文件连接和VHDL语言输入—各模块程序设计)实现数字钟的设计、下载和调试。 -CPLD based on the VHDL language digital clock (with stopwatch) design using a chip can be completed in addition to the clock source, buttons, speakers and display (LED) in addition to all functions of digital circuits. All digital logic functions are used in the CPLD device VHDL language. This design has a small and short design cycle (design process to achieve timing simulation), to facilitate debugging, fault rate is low and easy to modify the characteristics of the upgrade. The design uses a top-down, mixed input (input schematic- top-level file access and VHDL language input- the module program design) Design of digital clock, download and debug.
Platform: | Size: 95232 | Author: wuhuisong | Hits:

[VHDL-FPGA-VerilogEDA

Description: EDA实验讲义GK 包含GW48 EDA系统使用说明以及许多实例。比如有时钟使能的两位十进制计数器原理图输入设计、用状态机对ADC0809的采样控制电路实现、硬件电子琴电路设计-EDA experimental GK notes GW48 EDA system contains, as well as many examples of use. For example, there are two clock-enabled input decimal counter schematic design, using state machine control of the ADC0809 sampling circuit, electric circuit design hardware, etc.
Platform: | Size: 745472 | Author: lsp | Hits:

[SCMDigitalClock

Description: 数字时钟 附有程序及原理图 可以直接用 十分方便-Digital clock schematic diagram with the procedures and can be very convenient to use
Platform: | Size: 121856 | Author: 黄立 | Hits:

[Program docCLK

Description: Clock with big LED display, schematic can see here www.jendaelektro.ic.cz
Platform: | Size: 1024 | Author: jenda23 | Hits:
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